The present invention relates to a gate driver having level shift circuit for driving the gate of a power semiconductor device.
Many low voltage electronic circuits, e.g., MOSFET devices, are used to drive high voltage switching transistors, e.g., power MOSFETs, insulated gate bipolar transistor devices (IGBTs), gate controlled thyristors, and the like. A power semiconductor switch or device is switched from a nonconducting state to a conducting state by raising the gate-source voltage from below to above a threshold voltage. As used herein, the term xe2x80x9cpower devicexe2x80x9d or xe2x80x9cpower semiconductor devicexe2x80x9d refers to any power MOSFET, IGBT, thyristor, or the like.
One or more low voltage transistors, coupled to an output node of the gate driver, apply appropriate voltages to the gate or control terminal of the power device to turn on or turn off the power device. When the power device is an N-channel metal oxide semiconductor field effect transistor (NMOSFET), the device is turned on by applying a high voltage to the gate of the power switch and turned off by applying a low voltage to the gate. In contrast, if the power device is a P-channel metal oxide semiconductor field effect transistor (PMOSFET), the device is turned on by applying a low voltage to the gate of the power switch and turned off by applying a high voltage to the gate. Unless otherwise explained, power devices, as used herein, refer to in N type devices for ease of illustration.
Generally, a gate driver includes a level shifting circuit for shifting the potential of a small control signal to a higher voltage level that is more suitable for turning on the power device. The gate driver may be packaged as a single device having a high side portion and a low side portion, where the high side is used to turn on or off a high side switch or transistor of the power device and the low side is used to turn on or off a low side switch or transistor of the power device. The high side switch has a drain coupled to a high voltage source, e.g., 1000 volts, while the low side switch has a drain coupled to a lower voltage source, e.g., a source of the high side switch.
In one embodiment, a power module includes a power semiconductor device having a first terminal, a second terminal, and a third terminal. The second terminal is a control terminal to regulate flow of electricity between the first and third terminals. A gate driver has an output node coupled to the second terminal of the power device to provide gate control signals to the power semiconductor device. The gate driver includes a gate control signal generator having a first input and a second input and a first sub-circuit having a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay. The gate driver further includes a second sub-circuit coupled to the second input of the gate control signal generator.
In another embodiment, a gate driver includes a gate control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch and a first sub-circuit having a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay.
In yet another embodiment, a power device includes a gate control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch. A first sub-circuit has a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured to provide a signal to the first input with a reduced signal delay. A second sub-circuit includes a third signal path and a fourth signal path that are suitable for transmitting signals. The third and fourth signal paths are coupled to the second input of the gate control signal generator. The first input of the gate control signal generator receives a signal of first voltage from the first sub-circuit and the second input of the gate control signal generator receives a signal of second voltage from the second sub-circuit. The gate control signal generator outputs a gate control signal according to a voltage difference between the signal of first voltage and the signal of second voltage. The second signal path and fourth signal path are feed forward connections.